FPGA engineer (Junior/Senior)- RiscV IP core supplier (BCN)

Anunciado 2 de agosto
Tipo de jornada
Sin especificar
Tipo de contrato
Sin especificar
Salario
38.500€ - 60.000€ bruto/año
Estudios mínimos
Sin especificar
Nivel
Sin determinar
Número de vacantes
1
Tags Relacionados
Descripción del empleo
  • International company based in Barcelona specialized in Risc-V|Great oportunity to join a top engineers´ team

International company based in BCN with almost 10 years´ experience within semiconductor industry. Our client is european supplier of RISC-V IP cores





  • Integrate RTL code releases into new FPGA designs;

  • Configure FPGA peripherals for maximizing the performance of the RISC-V prototyping solutions;

  • Implement new RTL modules to provide the RISC-V core under emulation/prototyping with the optimal I/O configurations;

  • Interact with other teams to understand their requirements for new features and on how that can be leveraged into the FPGA designs;

  • Maintain and further improve our in-house FPGA resource pool;

  • Provide support and develop new features to be used in demonstration systems for company clients;




  • Career plan.

  • Competitive salary according to your experience VS salary expectations

  • Bonus based on performance.

  • Social benefits




Requisitos mínimos

  • +3 years of industrial experience

  • Bachelor's, Matser or PhD degree in computer science

  • Experience working with Xilinx (or Altera) FPGAs using Xilinx Vivado (or Altera Quartus).

  • Experience in using FPGA Integrated Logic Analyser probes;

  • Knowledge of AXI4/AXI4-Lite, UART, I2C, SPI protocols;

  • Proficient with HDL languages such as Verilog/SystemVerilog (or VHDL);

  • Experienced with FPGA timing and placement constraints using SDC syntax;

  • Experienced in TCL and Bash scripting for FPGA;

  • Experienced with version control;

  • Experienced with Linux based operating systems / distributions;

  • Knowledge of C/C++ and Python;




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